Title :
A study of threshold voltage for poly-silicon thin film transistors
Author :
Tang, Ming ; Chang, S.T. ; Ho, C.S.
Author_Institution :
Dept. Electr. Eng., National Chung Hsing Univ., Taichung
Abstract :
The paper presents a study of threshold voltage for poly-silicon TFTs through a designated experiment with several split conditions on the LDD implantation. Our results show that the abnormality of threshold voltage is caused by the effect of poly grain boundary trapping combining with the LDD condition along the channel edge region. In addition, PLN process is found to be another factor for the threshold voltage shift and variation. Theoretical interpretation by way of TCAD simulation is presented as well
Keywords :
elemental semiconductors; ion implantation; semiconductor doping; silicon; technology CAD (electronics); thin film transistors; LDD implantation; PLN process; Si; TCAD simulation; channel edge region; poly grain boundary trapping; polysilicon TFT; polysilicon thin film transistors; threshold voltage; Annealing; Conducting materials; Diodes; Implants; Insulation; Planarization; Stress; Temperature; Thin film transistors; Threshold voltage;
Conference_Titel :
Solid-State and Integrated Circuit Technology, 2006. ICSICT '06. 8th International Conference on
Conference_Location :
Shanghai
Print_ISBN :
1-4244-0160-7
Electronic_ISBN :
1-4244-0161-5
DOI :
10.1109/ICSICT.2006.306131
