• DocumentCode
    3463310
  • Title

    Design and implementation of a CMOS operational amplifier architecture with dual common-mode feedback loop

  • Author

    Papananos, Y. ; Tsividis, Yannis

  • Author_Institution
    Div. of Comput. Sci., Athens Nat. Tech. Univ., Greece
  • Volume
    2
  • fYear
    1996
  • fDate
    13-16 Oct 1996
  • Firstpage
    904
  • Abstract
    In this paper, the design and VLSI implementation of a fully balanced op amp in CMOS technology is presented. The op amp uses a dual common-mode (CM) feedback loop architecture which is compared to a single CM feedback loop techniques. Experimental measurements on the fabricated chip are presented
  • Keywords
    CMOS analogue integrated circuits; VLSI; feedback amplifiers; operational amplifiers; CMOS op amp architecture; CMOS operational amplifier; VLSI implementation; dual common-mode feedback loop; fully balanced op amp; CMOS technology; Computer architecture; Computer science; Crosstalk; Feedback circuits; Feedback loop; Filters; Operational amplifiers; Very large scale integration; Voltage;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electronics, Circuits, and Systems, 1996. ICECS '96., Proceedings of the Third IEEE International Conference on
  • Conference_Location
    Rodos
  • Print_ISBN
    0-7803-3650-X
  • Type

    conf

  • DOI
    10.1109/ICECS.1996.584531
  • Filename
    584531
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=3463310