• DocumentCode
    3463412
  • Title

    Realization of over 650V double RESURF LDMOS with HVI for high side gate drive IC

  • Author

    Qiao, Ming ; Li, Zhaoji ; Zhang, Bo ; Fang, Jian ; Li, Ming

  • Author_Institution
    IC design Center, Univ. of Electron. Sci. & Technol., Chengdu
  • fYear
    2006
  • fDate
    Oct. 2006
  • Firstpage
    248
  • Lastpage
    250
  • Abstract
    The two structures of over 650V MR & MR SLMFFP double RESURF LDMOSs with HVI are experimentally realized using SPSM BCD process for high side gate drive IC. The experimental results, coincident with the three-dimensional simulations, show that the breakdown voltage of LDMOS will increase by reducing the width of HVI metal line. The breakdown voltages of the MR double RESURF LDMOS are 670V, 760V, 990V when the widths of HVI metal lines are 20 mum, 5 mum, 0 mum, respectively. The breakdown voltages of the MR SLMFFP double RESURF LDMOS are 700V, 920V when the widths of HVI metal lines are 15 mum, 0 mum, respectively. An experimental half bridge gate drive IC is also successfully implemented, using the MR double RESURF LDMOS with HVI. As a result, the two proposed high voltage structures can be used in level shifting and HVJT for AC260V, without thick oxide and additional conductive layer
  • Keywords
    MOSFET; electric breakdown; integrated circuit interconnections; 260 to 990 V; 3D simulations; HVI metal line; SPSM BCD process; breakdown voltage; double RESURF LDMOS; high side gate drive integrated circuit; high voltage interconnection; Breakdown voltage; Bridge circuits; Costs; Drives; Electric breakdown; Electric potential; Logic; Low voltage; Silicon; Voltage control;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Solid-State and Integrated Circuit Technology, 2006. ICSICT '06. 8th International Conference on
  • Conference_Location
    Shanghai
  • Print_ISBN
    1-4244-0160-7
  • Electronic_ISBN
    1-4244-0161-5
  • Type

    conf

  • DOI
    10.1109/ICSICT.2006.306175
  • Filename
    4098075