• DocumentCode
    3463671
  • Title

    A novel FPGA-based method to design the merging unit following IEC 61850

  • Author

    Yin, Z.L. ; Liu, W.S.

  • Author_Institution
    North China Electr. Power Univ., Baoding, China
  • Volume
    1
  • fYear
    2004
  • fDate
    21-24 Nov. 2004
  • Firstpage
    260
  • Abstract
    Based on a brief analysis of the international standard for the interface between the electronic transducer and the protective device, this paper points out that the design of the merging unit is the key clement in implementing the interface. This paper introduces the function model of merging unit. With respect to the synchronization and interface problems in designing the merging unit according to the IEC 61850-9-1 standard, this paper proposes a new method using field programmable gate array (FPGA) to implement the main functions of merging unit.
  • Keywords
    IEC standards; field programmable gate arrays; synchronisation; transducers; FPGA; FPGA-based method; IEC 61850-9-1 standard; electronic transducer; field programmable gate array; international standard; merging unit; protective device; Clocks; Current measurement; Design methodology; Field programmable gate arrays; Frequency synchronization; IEC standards; Instrument transformers; Merging; Protection; Transducers;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Power System Technology, 2004. PowerCon 2004. 2004 International Conference on
  • Print_ISBN
    0-7803-8610-8
  • Type

    conf

  • DOI
    10.1109/ICPST.2004.1460003
  • Filename
    1460003