DocumentCode
3463981
Title
DC and pulsed DC stress evolution in copper interconnects
Author
Zhu, Lin ; Liu, Hong-xia
Author_Institution
Sch. of Microelectron., Xidian Univ., Xi´´an
fYear
2006
fDate
Oct. 2006
Firstpage
354
Lastpage
356
Abstract
Stress in copper interconnects under the direct current (DC) and pulsed DC bias, considering the impact of barrier layer, is calculated numerically. The calculation results show that the barrier layer used to stop the copper diffusion also reduces the stress in interconnects. The extent in reduction of stress under DC case is higher than that under the pulsed DC bias
Keywords
copper; diffusion barriers; integrated circuit interconnections; stress effects; barrier layer; copper diffusion; copper interconnects; direct current; pulsed DC bias; Aluminum; Chemicals; Copper; Grain boundaries; Integrated circuit interconnections; Microelectronics; Semiconductor materials; Tensile stress; Thermal stresses; Wide band gap semiconductors;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State and Integrated Circuit Technology, 2006. ICSICT '06. 8th International Conference on
Conference_Location
Shanghai
Print_ISBN
1-4244-0160-7
Electronic_ISBN
1-4244-0161-5
Type
conf
DOI
10.1109/ICSICT.2006.306250
Filename
4098107
Link To Document