Title :
Communication synthesis for embedded systems with global considerations
Author :
Ortega, Ross B. ; Borriello, Gaetano
Author_Institution :
Dept. of Comput. Sci. & Eng., Washington Univ., Seattle, WA, USA
Abstract :
Designers of distributed embedded systems require communication synthesis to more effectively explore the design space. Communication synthesis creates or instantiates the necessary software and hardware required to allow system components to exchange data. This work examines the problem of mapping a high-level specification to an arbitrary, but fixed architecture that uses particular bus protocols for interprocessor communication. The approach detailed in this paper illustrates that global considerations are necessary to achieve a correct implementation. A communication model is presented that allows for easy retargeting to different bus topologies and protocols. The effectiveness of this approach is demonstrated by mapping a high-level specification to different architectures
Keywords :
formal specification; logic design; multiprocessor interconnection networks; parallel architectures; protocols; real-time systems; system buses; systems analysis; bus protocols; bus topologies; communication synthesis; data exchange; distributed embedded systems design; hardware design; high-level specification; software design; Communication system control; Communication system software; Computer science; Design engineering; Embedded system; Hardware; Joining processes; Microprocessors; Protocols; Topology;
Conference_Titel :
Hardware/Software Codesign, 1997. (CODES/CASHE '97), Proceedings of the Fifth International Workshop on
Conference_Location :
Braunschweig
Print_ISBN :
0-8186-7895-X
DOI :
10.1109/HSC.1997.584581