An evolutionary approach to system-level synthesis

Author

Teich, Jürgen ; Blickle, Tobias ; Thiele, Lothar

Author_Institution

Comput. Eng. & Commun. Networks Lab., Swiss Federal Inst. of Technol., Zurich, Switzerland

fYear

1997

fDate

24-26 Mar 1997

Firstpage

167

Lastpage

171

Abstract

Considers system-level synthesis as the problem of optimally mapping a task-level specification onto a heterogeneous hardware/software architecture. This problem requires: (1) the selection of the architecture (allocation), including general-purpose and dedicated processors, ASICs, buses and memories; (2) the mapping of the algorithm onto the selected architecture in space (binding) and time (scheduling); and (3) the design space exploration, with the goal of finding a set of implementations that satisfy a number of constraints on cost and performance. In this paper, a new graph-based mapping model is introduced to specify the task of system-level synthesis as an optimization problem. An evolutionary algorithm is adapted to solve this problem and is applied to explore the design space of video-codec implementations

Keywords

computer architecture; formal specification; genetic algorithms; graph theory; high level synthesis; optimisation; processor scheduling; resource allocation; telecommunication computing; video codecs; ASICs; algorithm mapping; allocation; architecture selection; binding; buses; cost constraints; dedicated processors; design space exploration; evolutionary approach; general-purpose processors; graph-based mapping model; heterogeneous hardware/software architecture; memories; optimal mapping; optimization problem; performance constraints; scheduling; system-level synthesis; task-level specification mapping; video-codec implementations; Algorithm design and analysis; Computer architecture; Control system synthesis; Cost function; Evolutionary computation; Hardware; Network synthesis; Optimization methods; Software architecture; Space exploration;

fLanguage

English

Publisher

ieee

Conference_Titel

Hardware/Software Codesign, 1997. (CODES/CASHE '97), Proceedings of the Fifth International Workshop on

Conference_Location

Braunschweig

ISSN

1092-6100

Print_ISBN

0-8186-7895-X

Type

conf

DOI

10.1109/HSC.1997.584597

Filename

584597