Title :
A 320mV 56μW 411GOPS/Watt Ultra-Low Voltage Motion Estimation Accelerator in 65nm CMOS
Author :
Kaul, Himanshu ; Anders, Mark ; Mathew, Sanu ; Hsu, Steven ; Agarwal, Amit ; Krishnamurthy, Ram ; Borkar, Shekhar
Author_Institution :
Intel, Hillsboro, OR
Abstract :
Motion estimation for compressing inter-frame redundancies is the most performance and power-critical operation in video encoding applications, where a wide range of throughput and power constraints are required to handle a variety of video resolution, frame rate and application specifications. A motion estimation engine targeted for special-purpose on-die acceleration of sum of absolute difference (SAD) computation in real-time video encoding workloads on power-constrained mobile microprocessors is fabricated in 65nm CMOS.
Keywords :
CMOS integrated circuits; low-power electronics; microprocessor chips; motion estimation; video coding; CMOS technology; mobile microprocessors; motion estimation accelerator; power 56 muW; size 65 nm; sum of absolute difference; video encoding; video resolution; voltage 320 mV; Circuit noise; Degradation; Energy efficiency; Energy measurement; Frequency measurement; Motion estimation; Motion measurement; Multiplexing; Power measurement; Voltage;
Conference_Titel :
Solid-State Circuits Conference, 2008. ISSCC 2008. Digest of Technical Papers. IEEE International
Conference_Location :
San Francisco, CA
Print_ISBN :
978-1-4244-2010-0
Electronic_ISBN :
978-1-4244-2011-7
DOI :
10.1109/ISSCC.2008.4523184
