Ultra-low power RF circuits for SOCs in sensor networks

CMOS technology has now been successfully commercialized in numerous applications for wireless products. Highly integrated system on chip (SOC) parts, with both RF transceiver and complex digital functions on the same die, can be readily acquired on the open market. As wireless technology and usage proliferates, the continuing cost pressures will continue to steer designers to use CMOS. One emerging area is wireless ad-hoc sensor networks for medical, sensing, and environment monitoring applications. Such a network allows new nodes to join or drop easily, and often demands ultra-low power consumption in each node, with power targets of less than 1 mW. These low power targets are important because for portable operation, as silicon shrinks in size, a major component in the bill of material is the battery. This talk explores the choices that analog and RF IC designers have to make in these applications. The paper reviews radio architectures, and the tradeoffs one has to consider for low power consumption. The venerable superheterodyne architecture, along with the low-IF and direct conversion architectures, are discussed. The architectural discussion is followed by examination of circuit level implementation issues of key functions inside the RF transceiver is examined, including LNAs, mixers, transmitters, and frequency synthesis. The impact of modulation scheme on choices for certain blocks is shown. Emerging technologies to integrate highly selective RF filters on-chip are explored, including the use of MEMS.