Author :
Degani, Ofir ; Ruberto, Mark ; Cohen, Emanuel ; Eilat, Yishai ; Jann, Benjamin ; Cossoy, Fabian ; Telzhensky, Nikolay ; Maimon, Tzvi ; Normatov, Gregory ; Banin, Rotem ; Ashkenazi, Ori ; Ben Bassat, A. ; Zaguri, Sharon ; Hara, Gabriel ; Zajac, Mario ; Sha
Abstract :
This paper presents preliminary results of a radio chip design, implemented in a standard 90 nm CMOS process, which provides significant platform cost reduction by fully integrating the LNAs and high efficiency Class-AB PAs (and their matching networks) in a 1x2 scheme for 802.11a/g/n protocols.
Keywords :
CMOS integrated circuits; MIMO communication; low noise amplifiers; power amplifiers; protocols; transceivers; wireless LAN; CMOS process; LNA integration; MIMO multiband CMOS transceiver; WLAN applications; cost reduction; high efficiency Class-AB power amplifier; integrated front-end; low-noise amplifiers; protocols; size 90 nm; Antenna measurements; MIMO; OFDM; Power generation; Power measurement; Radio frequency; Temperature measurement; Testing; Transceivers; Wireless LAN;
