Title :
A Single-Power-Supply 0.7V 1GHz 45nm SRAM with An Asymmetrical Unit-Ã\x9f-ratio Memory Cell
Author :
Kawasumi, A. ; Yabe, T. ; Takeyama, Y. ; Hirabayashi, O. ; Kushida, K. ; Tohata, A. ; Sasaki, T. ; Katayama, A. ; Fukano, G. ; Fujimura, Y. ; Otsuka, N.
Author_Institution :
Toshiba Semicond., Kawasaki
Abstract :
A single-power supply 64 kB SRAM is fabricated in a 45 nm bulk CMOS technology. The SRAM operates at 1GHz with a 0.7 V supply using a fine-grained bitline segmentation architecture and with an asymmetrical unit-ratio 6T cell. With the asymmetrical cell, 22% cell area has been saved compared to a conventional symmetrical cell. This bulk SRAM is designed for GHz-class sub-lV operation.
Keywords :
CMOS integrated circuits; SRAM chips; power supply circuits; bulk CMOS technology; class sub-lV operation; fine-grained bitline segmentation architecture; frequency 1 GHz; single-power supply SRAM fabrication; size 45 nm; unit-beta-ratio memory cell; voltage 0.7 V; CMOS technology; Capacitance; Circuits; Degradation; Lithography; MOS devices; Optical amplifiers; Random access memory; Very large scale integration; Voltage;
Conference_Titel :
Solid-State Circuits Conference, 2008. ISSCC 2008. Digest of Technical Papers. IEEE International
Conference_Location :
San Francisco, CA
Print_ISBN :
978-1-4244-2010-0
Electronic_ISBN :
978-1-4244-2011-7
DOI :
10.1109/ISSCC.2008.4523217
