DocumentCode :
3465556
Title :
A 120mm2 16Gb 4-MLC NAND Flash Memory with 43nm CMOS Technology
Author :
Kanda, Kazushige ; Koyanagi, Masaru ; Yamamura, Toshio ; Hosono, Koji ; Yoshihara, Masahiro ; Miwa, Toru ; Kato, Yosuke ; Mak, Alex ; Chan, Siu Lung ; Tsai, Frank ; Cernea, Raul ; Le, Binh ; Makino, Eiichi ; Taira, Takashi ; Otake, Hiroyuki ; Kajimura, No
Author_Institution :
Toshiba, Yokohama
fYear :
2008
fDate :
3-7 Feb. 2008
Firstpage :
430
Lastpage :
625
Abstract :
NAND flash memory use in digital still cameras and cellular phones is driving demand for larger-capacity storage. Moreover, NAND flash has the potential to replace HDDs. To achieve larger capacity while maintaining low cost per bit, technical improvements in feature size and area reduction are essential. To meet the stringent requirements, we develop a 16 Gb 4-level NAND flash memory in 43 nm CMOS technology. In 43 nm generation, gate-induced drain leakage (GIDL) influences the electrical field on both sides of NAND strings. GIDL causes severe program disturb problems to NAND flash memories. To avoid GIDL, two dummy wordlines (WL) on both sides of NAND strings are added. This is effective because the dummy gate voltages, are selected independent of the program inhibit voltage.
Keywords :
CMOS logic circuits; NAND circuits; flash memories; CMOS technology; GIDL; NAND flash memory; WL; dummy wordlines; gate-induced drain leakage; size 43 nm; CMOS technology; Character generation; Costs; Decoding; Driver circuits; Nonvolatile memory; Routing; Switches; Variable structure systems; Voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State Circuits Conference, 2008. ISSCC 2008. Digest of Technical Papers. IEEE International
Conference_Location :
San Francisco, CA
Print_ISBN :
978-1-4244-2010-0
Electronic_ISBN :
978-1-4244-2011-7
Type :
conf
DOI :
10.1109/ISSCC.2008.4523241
Filename :
4523241
Link To Document :
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