DocumentCode
3465616
Title
A High-Performance Digital-Input Class-D Amplifier with Direct Battery Connection in a 90nm Digital CMOS Process
Author
Ramaswamy, Srinath ; Krishnan, Jagadeesh ; Forejt, Brett ; Joy, Jomy ; Burns, Mark ; Burra, Gangadhar
Author_Institution
Texas Instrum., Dallas, TX
fYear
2008
fDate
3-7 Feb. 2008
Firstpage
436
Lastpage
625
Abstract
The class-D amplifier system presented in this paper is a second-order architecture that operates on a digital PWM input and eliminates the use of an external carrier signal. It consists of two identical audio channels and a common section consisting of a PLL and a reference system. Each channel has a digital interpolation filter followed by a digital DeltaSigma modulator, PWM generator and two second-order analog loops.
Keywords
CMOS digital integrated circuits; amplifiers; delta-sigma modulation; digital filters; phase locked loops; pulse width modulation; PLL; PWM generator; audio channels; digital CMOS process; digital DeltaSigma modulator; digital PWM; digital interpolation filter; external carrier signal; high-performance digital-input class-D amplifier; second-order analog loops; size 90 nm; Batteries; CMOS process; Capacitors; Digital modulation; Driver circuits; Filters; Power amplifiers; Power supplies; Pulse amplifiers; Pulse width modulation;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Circuits Conference, 2008. ISSCC 2008. Digest of Technical Papers. IEEE International
Conference_Location
San Francisco, CA
Print_ISBN
978-1-4244-2010-0
Electronic_ISBN
978-1-4244-2011-7
Type
conf
DOI
10.1109/ISSCC.2008.4523244
Filename
4523244
Link To Document