Title :
Design Automation in the "Late-CMOS" Age
Author_Institution :
Senior Vice President, Chief Technology Officer, Advanced Research & Development, Cadence Design Systems, Inc.
Abstract :
Within the next 15 years, we will reach the end of Silicon based CMOS design. This talk will outline some of the challenges and opportunities presented as technology scales from 65nm today down to 22nm in this timeframe. New EDA technology requirements in the areas of Modeling, Synthesis, Functional Verification, and Reliability will be reviewed and some solutions proposed.
Keywords :
CMOS technology; Design automation; Electronic design automation and methodology; Semiconductor device modeling; Silicon;
Conference_Titel :
ASIC, 2005. ASICON 2005. 6th International Conference On
Print_ISBN :
0-7803-9210-8
DOI :
10.1109/ICASIC.2005.1611227
