Title :
IEEE-P1552 packaging architecture for computer-busboard systems (PACS)
Author :
Stora, Michael J. ; Droste, David
Author_Institution :
Modular Integration Technol., Boonton, NJ, USA
Abstract :
Initiated under IEEE-P1552 packaging architecture for computer-busboard systems (PACS) standards effort, this new electronic packaging specification extends the current two dimensional plug and play computer-based architecture of VMEbus, VXIbus, PCIbus, PXIbus, and several new standards into a three and four dimensional integrated hardware architecture. This extends power, control and signal forward front-to-back or back-to-front, in alignment with normal computer system serial functionality. Hardware interfaces relate primarily to packaging and data/signal/power interconnect mechanical/electrical mating specifications, that should permit subelements to be interchanged without impact on subelement interoperability. The standard functional performance is limited to mechanical engagement, connector styles/footprints, electrical pin characteristics, and pin mapping definitions
Keywords :
IEEE standards; automatic test equipment; electric connectors; packaging; system buses; IEEE-PI552 packaging architecture; PACS; PCIbus; PXIbus; VMEbus; VXIbus; automatic test systems; computer-busboard systems; connector footprints; connector styles; data/signal/power interconnect; electrical pin characteristics; electronic packaging specification; four dimensional integrated hardware architecture; mating specifications; mechanical engagement; pin mapping definitions; subelement interoperability; three dimensional integrated hardware architecture; Automatic testing; Computer architecture; Connectors; Costs; Electronics packaging; Hardware; Picture archiving and communication systems; Software testing; Standards organizations; System testing;
Conference_Titel :
AUTOTESTCON Proceedings, 2001. IEEE Systems Readiness Technology Conference
Conference_Location :
Valley Forge, PA
Print_ISBN :
0-7803-7094-5
DOI :
10.1109/AUTEST.2001.948918
