DocumentCode :
3466156
Title :
Reliability Issues and Models of sub-90nm NAND Flash Memory Cells
Author :
Yang, Hong ; Kim, Hyunjae ; Park, Sung-il ; Kim, Jongseob ; Lee, Sung-Hoon ; Choi, Jung-Ki ; Hwang, Duhyun ; Kim, Chulsung ; Park, Mincheol ; Lee, Keun-Ho ; Park, Young-Kwan ; Shin, Jai Kwang ; Kong, Jeong-Taek
Author_Institution :
CAE Team, Samsung Electron. Co. Ltd., Hwasung
fYear :
2006
fDate :
23-26 Oct. 2006
Firstpage :
760
Lastpage :
762
Abstract :
The reliability issues, including 100k cycle´s endurance and 2 hours high temperature storage (HTS: 150degC, 200degC and 250degC) of sub-90nm NAND flash cells, are studied. Furthermore, the trap generation models in endurance and interface trap recovery model in HTS are proposed. Endurance characteristics show that the interface trap and bulk trap generation have a power-dependence on program/erase cycle count (DeltaNit, DeltaNot infin cycleuarrm). The exponent of interface trap generation both program and erase are 0.62; while in bulk trap generation, the exponent for the cycle count is 0.30, which is extracted only from the erased cells due to varying stored charges of programmed cells during tunnel oxide degradation. The HTS characteristics show that the interface trap recovery and electron-detrapping are the major mechanisms for sub-90nm NAND flash memory, while stress induced leakage current (SILC) is almost negligible. Thus, based on the reaction-diffusion (R-D) model and Arrhenius approximation, the simplified interface recovery model in HTS is proposed as: dNit/Nit = -k0 middot exp(-Ea/kBT) middot dt
Keywords :
flash memories; leakage currents; logic gates; 150 C; 200 C; 250 C; 90 nm; Arrhenius approximation; NAND flash memory cells; bulk trap generation; electron-detrapping; high temperature storage; interface trap generation; interface trap recovery model; program/erase cycle count; programmed cells; reaction-diffusion model; reliability issue; stress induced leakage current; trap generation models; tunnel oxide degradation; Computer aided engineering; Electron traps; Electronic equipment testing; High temperature superconductors; Leakage current; Physics; Power generation; Research and development; Semiconductor device reliability; Thermal stresses;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State and Integrated Circuit Technology, 2006. ICSICT '06. 8th International Conference on
Conference_Location :
Shanghai
Print_ISBN :
1-4244-0160-7
Electronic_ISBN :
1-4244-0161-5
Type :
conf
DOI :
10.1109/ICSICT.2006.306478
Filename :
4098226
Link To Document :
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