A systolic filter for low-level processing of the discrete wavelet transform

The discrete wavelet transform requires repeated high and low pass filtering of data scan lines. There has been a variety of special purpose devices and parallel algorithms designed to speedup this computationally intensive process. This paper describes a systolic filter intended for low-level processing of data scan lines. This processing is required for one-dimensional and higher dimensional DWT. Operations required by high and low pass filtering are interleaved on a single pipelined processor array. The filter has multirate characteristics. Implementation in reconfigurable hardware with dynamic reconfiguration is discussed