Improved Program Mode for Memory Array Based on Ferroelectric-Gate Field-Effect Transistor

Author

Li, W.F. ; Kang, J.F. ; Liu, X.Y. ; Du, G. ; Han, R.Q. ; Wang, Y.Y. ; Ma, T.P.

Author_Institution

Shenzhen Graduate Sch., Peking Univ., Shenzhen

fYear

2006

fDate

23-26 Oct. 2006

Firstpage

812

Lastpage

814

Abstract

An improved program mode for memory array based on ferroelectric field effect transistor (Fe-FET) is proposed. A SPICE macro-model for the transfer characteristics of Fe-FET devices, based on the Schmitt trigger circuit, is demonstrated and applied to circuit simulation. The simulation results show that, compared to the conventional program mode, the improved program mode can effectively reduce the requirements for the performance of Fe-FET, and consequently enhance the operation robustness of the Fe-FET based memory array circuit, as well as extend the design window

Keywords

SPICE; circuit simulation; field effect transistors; integrated memory circuits; trigger circuits; SPICE macro-model; Schmitt trigger circuit; ferroelectric-gate field-effect transistor; memory array; program mode; transfer characteristics; Circuit simulation; FETs; Ferroelectric materials; Microelectronics; Nanotechnology; Nonvolatile memory; SPICE; Threshold voltage; Trigger circuits; Voltage control;

fLanguage

English

Publisher

ieee

Conference_Titel

Solid-State and Integrated Circuit Technology, 2006. ICSICT '06. 8th International Conference on

Conference_Location

Shanghai

Print_ISBN

1-4244-0160-7

Electronic_ISBN

1-4244-0161-5

Type

conf

DOI

10.1109/ICSICT.2006.306515

Filename

4098242