A new HW/SW co-design methodology to generate a system level platform based on LISA

A new methodology to build HW/SW co-design platform based on machine description language-LISA is presented in this paper. The most important aims of this method are to model a retargetable processor at the early stage of HW/SW co-design so as to get optimum results for system level analysis. Also it helps to speed up time-to-market and ease manual work. Furthermore, this method is flexible and can be used for designing either general purpose processor (GPP) or application specified instruction-set processor (ASIP). With the design flow, we have been able to verify and evaluate one VLIW processor - SuperV2 in less than one month