Title :
Modelisation of current-voltage static characteristics of MOS structures
Author :
Boumedine, Fazia ; Oussalah, Slimane ; Belkaid, Mohammed Said
Author_Institution :
Electron. Dept., Mouloud Mammeri Univ. of Tizi Ouzou, Tizi Ouzou
Abstract :
Charge transport in thick SiO2-based dielectric layer was investigated by means of ramp voltage stressed current voltage I(V) simulation. To determine the electrical parameters of the oxide layer, we have based our study on a theoretical model developed by Chen and Wu [1]. In [1], a computer program using the fourth-order Runge-Kutta-Gill numerical method was set up to simulate the set of equations. In this work, we have combined Euler and Newton-Raphson numerical methods to simulate the model. The most important parameter, electric field breakdown, is extracted. Also, the thickness of oxide and the ramping rate are analyzed to demonstrate their effects on the current in the oxide and the breakdown voltage. The oxide electric resistivity is introduced [2] since it affects the current at low voltages. The simulation results are confirmed by experimental ones.
Keywords :
MOS capacitors; Newton-Raphson method; Runge-Kutta methods; dielectric materials; semiconductor device breakdown; silicon compounds; Euler methods; MOS structures; Newton-Raphson numerical methods; SiO2; charge transport; current-voltage static characteristics; dielectric layer; electric field breakdown; fourth-order Runge-Kutta-Gill numerical method; oxide electric resistivity; ramp voltage stressed current voltage simulation; CMOS technology; Charge carrier processes; Computational modeling; Dielectrics; Electric breakdown; Impact ionization; Laboratories; Nanoscale devices; Silicon; Voltage; Characterisation; F-N tunneling effect; MOS; breakdown field; modeling;
Conference_Titel :
Systems, Signals and Devices, 2009. SSD '09. 6th International Multi-Conference on
Conference_Location :
Djerba
Print_ISBN :
978-1-4244-4345-1
Electronic_ISBN :
978-1-4244-4346-8
DOI :
10.1109/SSD.2009.4956764