• DocumentCode
    3467470
  • Title

    CMOS digital integrated temperature sensor

  • Author

    Jianping, Zeng ; Yu, Li ; Haiqing, Xie ; Jian, Wen

  • Author_Institution
    Microelectron. Inst., Hunan Univ., Changsha
  • Volume
    1
  • fYear
    2005
  • fDate
    24-0 Oct. 2005
  • Firstpage
    248
  • Lastpage
    252
  • Abstract
    Substrate PNP transistors were as the temperature sensing devices. The PTAT current generator and CTAT current generator were designed based on the theory of band-gap reference (BGR). The BGR circuit was adapted to self-bias and common source and common gate current mirror structure in order to obtain low power consumption, high linear and high PSRR (power supply rejection ratio). The temperature modulate circuit was designed with the current-input mode Sigma-Delta converter and duty-cycle-modulate type output, which was designed incorporated with the forestage BGR circuit, and the voltage reference generator was the expansion of the BGR. The CSMC 0.6mum process model library was chosen for design. And the Cadence Spectre simulator was used for the circuits´ simulation and test. The results displayed that the minimum accuracy of the temperature sensor we designed was 0.5degC at the range of -40degC~+140degC, and the minimum power consumption was just 500muW
  • Keywords
    CMOS digital integrated circuits; reference circuits; sigma-delta modulation; temperature sensors; -40 to 140 C; 0.5 C; 0.6 micron; 500 muW; CMOS digital integrated circuit; CTAT current generator; Cadence Spectre simulator; PNP transistors; PTAT current generator; Sigma-Delta converter; band-gap reference circuit; common gate current mirror; common source current mirror; power supply rejection ratio; temperature modulate circuit; temperature sensor; voltage reference generator; Circuit simulation; Circuit testing; Delta-sigma modulation; Energy consumption; Libraries; Mirrors; Photonic band gap; Power supplies; Temperature sensors; Voltage; Σ-Δ converter; Band-gap reference; Common source and common gate current mirror; Self-bias; Substrate PNP transistors;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    ASIC, 2005. ASICON 2005. 6th International Conference On
  • Conference_Location
    Shanghai
  • Print_ISBN
    0-7803-9210-8
  • Type

    conf

  • DOI
    10.1109/ICASIC.2005.1611312
  • Filename
    1611312