Title :
Power Comple ity Analysis of Adiabatic SRAM
Author :
Ang, Ang ; Song, Ia ; Ijiu, I.
Author_Institution :
Inst. of Microelectron., Peking Univ., Beijing
Abstract :
The paper presents a power analysis model for adiabatic SRAM. According to different performance frequency and different memory size, we simulate, analyze and compare adiabatic SRAM´s power characteristics and propose the model. Based on the power analysis model, a scheme of array-division for adiabatic SRAM is presented. With array-division structure, the power dissipation is related to m, which is the array-division value. When the value increases, the main source of SRAM power is changed from word-line and cell-clock to decoder
Keywords :
SRAM chips; integrated circuit modelling; low-power electronics; adiabatic SRAM; adiabatic circuit; array-division structure; power analysis model; power complexity analysis; power dissipation; Analytical models; CMOS technology; Capacitance; Circuits; Decoding; Frequency; Power dissipation; Random access memory; Semiconductor device modeling; Voltage; SRAM; adiabatic circuit; array-division; power analysis model;
Conference_Titel :
ASIC, 2005. ASICON 2005. 6th International Conference On
Conference_Location :
Shanghai
Print_ISBN :
0-7803-9210-8
DOI :
10.1109/ICASIC.2005.1611318
