DocumentCode
3467965
Title
Fast locally consistent dense stereo on multicore
Author
Mattoccia, Stefano
Author_Institution
Dipt. di Elettron. Inf. e Sist. (DEIS), Univ. of Bologna, Bologna, Italy
fYear
2010
fDate
13-18 June 2010
Firstpage
69
Lastpage
76
Abstract
Many computer vision applications require fast and accurate 3D measurements. However, despite the advent of powerful computing architectures (e.g., multicore CPU and GPU), most top-ranked dense stereo algorithms rely on global 2D disparity optimization methods that are often too slow for practical use. Moreover, their huge memory requirements are typically not suited to devices with constrained resources (e.g., FPGA). Nevertheless, algorithms based on 1D disparity optimization methods (i.e., Dynamic Programming and Scanline Optimization) provide a good trade-off between accuracy and efficiency with a limited memory footprint. In this paper, we show that enforcing a relaxed local consistency constraint to the disparity fields, provided by fast 1D disparity optimization methods, yields much more rapidly, results comparable to those of the top-ranked approaches. The simple and non-iterative computational structure of our proposal enables us to exploit coarse grained parallelism on multicore CPUs. Moreover, due to its limited memory footprint, our proposal could be potentially mapped on devices, such as FPGA, with constrained resources.
Keywords
dynamic programming; field programmable gate arrays; multiprocessing systems; stereo image processing; coarse grained parallelism; computer vision applications; dense stereo algorithms; dynamic programming; fast 1D disparity optimization; field programmable gate arrays; global 2D disparity optimization; multicore CPU; scanline optimization; Application software; Computer architecture; Computer vision; Concurrent computing; Dynamic programming; Field programmable gate arrays; Multicore processing; Optimization methods; Proposals; Stereo vision;
fLanguage
English
Publisher
ieee
Conference_Titel
Computer Vision and Pattern Recognition Workshops (CVPRW), 2010 IEEE Computer Society Conference on
Conference_Location
San Francisco, CA
ISSN
2160-7508
Print_ISBN
978-1-4244-7029-7
Type
conf
DOI
10.1109/CVPRW.2010.5543767
Filename
5543767
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