DocumentCode
3468177
Title
A new high-speed low-voltage charge pump for PLL applications
Author
Yu, Hong ; Inoue, Yasuaki ; Han, Yan
Author_Institution
Graduate Sch. of Inf., Production & Syst., Waseda Univ., Kitakyushu-shi
Volume
1
fYear
2005
fDate
24-0 Oct. 2005
Firstpage
387
Lastpage
390
Abstract
The various nonideal phenomena in the charge pump circuits are discussed in this paper. The relevant effects and solutions are also presented. Based on the above analysis, we propose a new simple charge pump circuit, which is suitable for high speed PLL circuits and can work at a low supply. The charge pump is designed in a standard CMOS 0.18 mum technology. The SPECTRE simulation results show the capability of high-frequency operation (1GHz) with very low-power consumption (28muW) at the 1V power supply. Moreover, the output waveform does not exhibit spurious jumps
Keywords
CMOS integrated circuits; high-speed integrated circuits; low-power electronics; phase locked loops; 0.18 micron; 1 GHz; 1 V; 28 muW; CMOS technology; PLL applications; SPECTRE simulation; high frequency operation; high-speed low-voltage charge pump; low power consumption; CMOS technology; Charge pumps; Circuit simulation; Filters; Phase locked loops; Production systems; Switches; Switching circuits; Virtual colonoscopy; Voltage-controlled oscillators;
fLanguage
English
Publisher
ieee
Conference_Titel
ASIC, 2005. ASICON 2005. 6th International Conference On
Conference_Location
Shanghai
Print_ISBN
0-7803-9210-8
Type
conf
DOI
10.1109/ICASIC.2005.1611344
Filename
1611344
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