Analytical modeling of the tunneling current in Schottky barrier carbon nanotube field effect transistor using the Verilog-A language

Author

Najari, M. ; Frégonèse, S. ; Maneux, C. ; Zimmer, T. ; Mnif, H. ; Masmoudi, N.

Author_Institution

IMS Lab., Univ. Bordeaux 1, Talence

fYear

2009

fDate

23-26 March 2009

Firstpage

1

Lastpage

6

Abstract

In this work, we have developed a compact analytical model for the I-V characteristics of tunnel current in a Schottky barrier CNTFET which features the main physical effects governing the operation of this device. The simulation results obtained using this model are in close agreement with numerical calculation results. This model can be implemented with a hardware description language (HDL) language like Verilog- A or VHDL-AMS for portability and standardization.

Keywords

Schottky barriers; Schottky gate field effect transistors; carbon nanotubes; hardware description languages; nanotube devices; semiconductor device models; tunnel transistors; C; I-V characteristics; Schottky barrier CNTFET; VHDL-AMS; Verilog-A language; analytical modeling; hardware description language; tunneling current; Analytical models; CNTFETs; Hardware design languages; Schottky barriers; Tunneling; One; five; four; three; two;

fLanguage

English

Publisher

ieee

Conference_Titel

Systems, Signals and Devices, 2009. SSD '09. 6th International Multi-Conference on

Conference_Location

Djerba

Print_ISBN

978-1-4244-4345-1

Electronic_ISBN

978-1-4244-4346-8

Type

conf

DOI

10.1109/SSD.2009.4956817

Filename

4956817