A new placement algorithm dedicated to parallel computers: bases and application

Author

Clermidy, Fabien ; Collette, Thierry ; Nicolaïdis, Michael

Author_Institution

CEA, Centre d´´Etudes Nucleaires de Saclay, Gif-sur-Yvette, France

fYear

1999

fDate

1999

Firstpage

242

Lastpage

249

Abstract

One way to improve reliability in parallel computers consists of adding supplementary processors and interconnections to the functional structure in order to replace faulty processors with respect to the network structure. This approach is named structural fault tolerance (SFT). Very integrated parallel computers are one way to implement a parallel structure. The material structure is then composed of many elementary blocks, such as ASICs or multi-chip modules (MCMs), each containing many processors. We show that former SFT methods fail in combining the different features, constraints and requirements of such structures. Thus, this paper introduces a new reconfiguration approach that is dedicated to very integrated parallel computers

Keywords

application specific integrated circuits; fault tolerant computing; multichip modules; multiprocessor interconnection networks; parallel algorithms; parallel architectures; reconfigurable architectures; ASICs; elementary blocks; faulty processor replacement; functional structure; interconnection network structure; multichip modules; placement algorithm; reconfiguration; reliability; structural fault tolerance; supplementary interconnections; supplementary processors; very integrated parallel computers; Application software; Application specific integrated circuits; Bandwidth; Computer applications; Concurrent computing; Operating systems; Routing; Temperature; Testing;

fLanguage

English

Publisher

ieee

Conference_Titel

Dependable Computing, 1999. Proceedings. 1999 Pacific Rim International Symposium on

Print_ISBN

0-7695-0371-3

Type

conf

DOI

10.1109/PRDC.1999.816235

Filename

816235