Experimental parametric study of the parasitic inductance influence on MOSFET switching characteristics

Author

Chen, Zheng ; Boroyevich, Dushan ; Burgos, Rolando

Author_Institution

Bradley Dept. of Electr. & Comput. Eng., Virginia Polytech. Inst. & State Univ., Blacksburg, VA, USA

fYear

2010

fDate

21-24 June 2010

Firstpage

164

Lastpage

169

Abstract

This paper presents an experimental parametric study of the parasitic inductance influence on MOSFET switching waveforms. The three most critical stray inductances, namely the gate-loop, switching-loop, and common-source inductances have all been studied and compared in terms of their effect on waveform ringing, switching loss, device stress, and electromagnetic interference. Based on the results obtained, a guideline has been established for the layout and design of high-speed switching circuits.

Keywords

electromagnetic interference; field effect transistor switches; inductance; network synthesis; MOSFET switching waveforms characteristics; common source inductance; device stress; electromagnetic interference; gate loop inductance; high speed switching circuit design; parasitic inductance; stray inductance; switching loop inductance; switching loss; waveform ringing; Electromagnetic interference; Inductance; Inductors; MOSFET circuits; Packaging; Parametric study; Power MOSFET; Stress; Switching circuits; Switching loss; Power MOSFET; parametric study; parasitic inductance; switching characteristics;

fLanguage

English

Publisher

ieee

Conference_Titel

Power Electronics Conference (IPEC), 2010 International

Conference_Location

Sapporo

Print_ISBN

978-1-4244-5394-8

Type

conf

DOI

10.1109/IPEC.2010.5543851

Filename

5543851