Title :
A flexible communication scheme for rationally-related clock frequencies
Author :
Chabloz, Jean-Michel ; Hemani, Ahmed
Author_Institution :
Dept. of Electron. Syst., KTH - R. Inst. of Technol., Stockholm, Sweden
Abstract :
As a replacement for the fast-fading Globally-Synchronous model, we have defined a flexible design style for SoCs, called GRLS, for Globally-Ratiochronous, Locally-Synchronous, which does not rely on global synchronization and is based on using rationally-related clock frequencies derived from the same source. In this paper, using the special periodical properties of rationally-related systems, we build a latency-insensitive, maximal-throughput, low-overhead communication method, based on the idea of using both clock edges to sample data at the Receiver. The validity of the method and its resistance to non-idealities such as jitter, misalignments and clock drifts are formally proven while experimental results including overhead are presented for 90 nm technology. Despite allowing much greater flexibility, the overhead of our method is comparable to that of state-of-the-art mesochronous communication techniques. We also show performances, complexity and overhead improvements over all other approaches that have so far been proposed for rationally-related clock frequencies.
Keywords :
clocks; synchronisation; system-on-chip; GRLS; SoC flexible design; flexible communication; globally ratiochronous SoC; latency insensitive method; locally synchronous SoC; low overhead communication method; maximal throughput method; rationally related clock frequencies; Buildings; Clocks; Costs; Design engineering; Energy consumption; Frequency synchronization; Jitter; Phase locked loops; Taxonomy; Timing;
Conference_Titel :
Computer Design, 2009. ICCD 2009. IEEE International Conference on
Conference_Location :
Lake Tahoe, CA
Print_ISBN :
978-1-4244-5029-9
Electronic_ISBN :
1063-6404
DOI :
10.1109/ICCD.2009.5413166