DocumentCode :
3469913
Title :
A fast and stable force-directed placement with implicit buffer planning
Author :
Luo, Lijuan ; Zhou, Qiang ; Cai, Yici ; Hong, Xianlong ; Wang, Yibo ; Yang, Hannah Honghua
Author_Institution :
Dept. of Comput. Sci. & Telecommun., Tsinghua Univ., Beijing
Volume :
2
fYear :
2005
fDate :
24-0 Oct. 2005
Firstpage :
848
Lastpage :
851
Abstract :
As technology advances, the number of required buffers increases significantly and it is desirable to plan buffers at placement stage. This paper studies the approach of planning buffers during analytical placement. First, a fast and stable force-directed placement is introduced, which is averagely 1.71 times as fast as Capo8.8, a state-of-the-art placement tool, with little degradation of wire-length. Then a new model for planning buffers during placement is proposed, which can efficiently ensure the convergence of placement iterations only by modeling buffers implicitly with changed density distribution and modified connectivity weight between drivers and receivers. Also, equivalent candidate positions for buffer insertion are explored to resolve buffer overlaps. Experiments show that compared with previous buffer planning methods, our new approach can achieve greater efficiency as well as quality improvement
Keywords :
buffer circuits; circuit optimisation; integrated circuit interconnections; Capo8.8; buffer insertion; buffer overlaps; density distribution; force-directed placement; implicit buffer planning; placement iterations; Chip scale packaging; Circuit optimization; Circuit synthesis; Convergence; Degradation; Explosions; Integrated circuit interconnections; Large-scale systems; Logic design; Research and development;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
ASIC, 2005. ASICON 2005. 6th International Conference On
Conference_Location :
Shanghai
Print_ISBN :
0-7803-9210-8
Type :
conf
DOI :
10.1109/ICASIC.2005.1611438
Filename :
1611438
Link To Document :
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