• DocumentCode
    3469973
  • Title

    Interconnect delay optimization using a novel hybrid insertion strategy

  • Author

    Liu, Xiangyuan ; Chen, Shuming

  • Author_Institution
    Sch. of Comput. Sci., Nat. Univ. of Defense Technol., Changsha
  • Volume
    2
  • fYear
    2005
  • fDate
    24-0 Oct. 2005
  • Firstpage
    860
  • Lastpage
    863
  • Abstract
    Interconnection techniques play an important role in the growth of semiconductor industry into future generations. A novel hybrid insertion strategy based on repeaters and low-swing differential-signaling circuits for global interconnect is presented in this paper. It takes advantage of those circuits on driving long wires in different length, and optimally inserts them along the wires. Simulation results using HSPICE for 0.18mum process show that delay, energy, energy-delay-product (EDP) and area are considerably decreased compared with other strategies available. Moreover, it is very suitable for integration in an EDA tool flow and helpful to the reuse of low-swing differential-signaling circuits
  • Keywords
    SPICE; circuit optimisation; circuit simulation; integrated circuit interconnections; integrated circuit modelling; HSPICE; differential-signaling circuits; energy-delay-product; interconnect delay optimization hybrid insertion strategy; low-swing circuits; CMOS technology; Capacitance; Computer science; Electronic design automation and methodology; Electronics industry; Hybrid power systems; Integrated circuit interconnections; Propagation delay; Repeaters; Wires; delay; differential-signaling; insertion strategy; interconnects; low-swing; power;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    ASIC, 2005. ASICON 2005. 6th International Conference On
  • Conference_Location
    Shanghai
  • Print_ISBN
    0-7803-9210-8
  • Type

    conf

  • DOI
    10.1109/ICASIC.2005.1611441
  • Filename
    1611441