Design tools for 3D mixed mode placement

Author

Li, Zhuoyuan ; Yan, Haixia ; Hong, Xianlong ; Zhou, Qiang ; Bian, Jinian ; Yang, Hannah H. ; Pitchumani, Vijay

Author_Institution

Dept. of Comput. Sci. & Technol., Tsinghua Univ., Beijing

Volume

2

fYear

2005

fDate

24-0 Oct. 2005

Firstpage

792

Lastpage

796

Abstract

We present a set of design tools for three dimensional (3D) mixed mode placement (MMP). The hierarchical 3D MMP design tool is composed of a hierarchical clustering package, a new 3D floorplanning tool, route planning tool, and 2D global/detailed placement tools. We have analyzed the performance of 3D circuit using these tools. It is shown that total wirelength could be reduced by 25% to 43% compared with traditional 2D design using two to four stacked dies. By incorporating thermal management and analysis, we also investigate the thermal scalability of 3D integration

Keywords

integrated circuit layout; logic design; mixed analogue-digital integrated circuits; thermal analysis; thermal management (packaging); 2D global/detailed placement tools; 3D MMP design tool; 3D circuit; 3D floorplanning tool; 3D integration; 3D mixed mode placement; hierarchical clustering package; route planning tool; stacked dies; thermal analysis; thermal management; Circuits; Clustering algorithms; Complexity theory; Computer science; Graphical user interfaces; Nonhomogeneous media; Packaging; Routing; Temperature; Thermal management;

fLanguage

English

Publisher

ieee

Conference_Titel

ASIC, 2005. ASICON 2005. 6th International Conference On

Conference_Location

Shanghai

Print_ISBN

0-7803-9210-8

Type

conf

DOI

10.1109/ICASIC.2005.1611447

Filename

1611447