DocumentCode
3470135
Title
Early-stage power grid analysis using a supenode-like formulation of circuit equations
Author
Cheng Zhuo ; Hua-feng Zhang ; Jin-fang Zhou ; Shi-chuan Du ; Xin Wu ; Wen-jie Mao ; Kang-sheng Chen
Author_Institution
Dept. of Inf. Sci. & Electron. Eng., Zhejiang Univ., Hangzhou
fYear
2006
fDate
23-26 Oct. 2006
Firstpage
1432
Lastpage
1434
Abstract
The continuing VLSI technology scaling and increasing Ldi/dt noise have led to more significant power supply fluctuations, which need to be modeled fast and accurately even in early-stage power grid design. In this paper the authors propose a supernode-like formulation of circuit equations, which may reduce the number of the linear equation variables to about one-third of that formulated by a regular method in Chen, T and Chen, CC, 2001. A prediction-and-correction technique is used to make the algorithm robust. With the stability analysis it can be seen that enlarging the time step will not impact the accuracy, and hence can be incorporated into other solvers. Experimental results demonstrate that our algorithm can achieve a similar accuracy while it is about 4.5times faster than the regular formulation method
Keywords
VLSI; integrated circuit modelling; integrated circuit noise; stability; VLSI technology scaling; circuit equations; linear equation; power grid analysis; power supply fluctuations; stability analysis; Circuit noise; Equations; Equivalent circuits; Noise generators; Power grids; RLC circuits; Resistors; Stability analysis; Transmission line matrix methods; Wire;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State and Integrated Circuit Technology, 2006. ICSICT '06. 8th International Conference on
Conference_Location
Shanghai
Print_ISBN
1-4244-0160-7
Electronic_ISBN
1-4244-0161-5
Type
conf
DOI
10.1109/ICSICT.2006.306227
Filename
4098431
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