• DocumentCode
    3470191
  • Title

    FPGA placement using genetic algorithm with simulated annealing

  • Author

    Yang, M. ; Almaini, A.E.A. ; Wang, L. ; Pengjun Wang

  • Author_Institution
    Sch. of Eng., Napier Univ. of Edinburgh, UK
  • Volume
    2
  • fYear
    2005
  • fDate
    24-27 Oct. 2005
  • Firstpage
    806
  • Lastpage
    810
  • Abstract
    A mixed genetic algorithm and simulated annealing (GASA) algorithm is used for the placement of symmetrical FPGA. The proposed algorithm includes 2 stage processes. In the first stage process it optimizes placement solutions globally using GA. In the second stage process it locally improves solution. GASA overcomes the slow convergence of genetic algorithm in the late phase of the process of genetic algorithm. The results show that GASA consumes less CPU time than GA and could achieve performance as good as versatile placement and routing tool in terms of placement cost.
  • Keywords
    field programmable gate arrays; genetic algorithms; logic design; simulated annealing; FPGA placement; GASA algorithm; genetic algorithm; simulated annealing; symmetrical FPGA; Application specific integrated circuits; Circuit simulation; Convergence; Costs; Field programmable gate arrays; Genetic algorithms; Logic devices; Prototypes; Routing; Simulated annealing;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    ASIC, 2005. ASICON 2005. 6th International Conference On
  • Print_ISBN
    0-7803-9210-8
  • Type

    conf

  • DOI
    10.1109/ICASIC.2005.1611450
  • Filename
    1611450