DocumentCode :
3470283
Title :
VLSI Floorplan Based on Less Flexibility First Principle and Linear Programming
Author :
Yuan, Jun ; Dong, Sheqin ; Hong, Xianlong ; Wu, Yuliang
Author_Institution :
Department of Computer Science and Technology, Tsinghua University, Beijing 100084, China, Tel: +86-010-62785564, Fax: +86-010-62781489. e-mail: yuanj02@mails.tsinghua.edu.cn
Volume :
2
fYear :
2005
fDate :
24-27 Oct. 2005
Firstpage :
832
Lastpage :
835
Abstract :
This paper presents an efficient algorithm for fixed-outling floorplanning based on a quasi-human rectangle packing principle named as "Less Flexibility First" and linear programming. The proposed algorithm consists of a global floorplanning, whose main objective is to fulfill the floorplan in the fixed-outline, and a detailed floorplanning whose main objective is wire length optimization. In the global floorplanning, we use the "Less Flexibility First" principle to get a legal floorplan. And in the detailed floorplannig, we use a linear programming approach to optimize the wire length. In our approach, the floorplan is optimized by iterating these global and detailed floorplannings. Experimental results demonstrate that our method shows a great advantage in floorplan.
Keywords :
Computer science; Delay; Electronic mail; Integrated circuit interconnections; Law; Legal factors; Linear programming; Process design; Very large scale integration; Wire;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
ASIC, 2005. ASICON 2005. 6th International Conference On
Print_ISBN :
0-7803-9210-8
Type :
conf
DOI :
10.1109/ICASIC.2005.1611456
Filename :
1611456
Link To Document :
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