DocumentCode :
3470291
Title :
Fine pitch PoP introduction
Author :
JinSeong Kim ; GyuWan Han ; Byoungwoo Cho ; Yesul Ahn ; Dongjoo Park ; JuHoon Yoon ; Choon Heung ; Yoshida, Atsushi
Author_Institution :
Lee R&D Center, Amkor Technol. Korea, Seoul, South Korea
fYear :
2013
fDate :
11-13 Nov. 2013
Firstpage :
1
Lastpage :
4
Abstract :
Package-on-package (PoP) has been widely adopted for 3D integration of logic and memory within mobile handsets and other portable multimedia devices. Typical PoP solution is applied to logic processor as bottom package and memory device as top package. TMV® solution is being applied to reduce the warpage and achieve the fine pitch PoP and stable stacking performance. Currently, 0.4mm MIF(Memory Interface Pitch) is the minimum pitch under production and more fine MIF pitch is being requested because more functions are being integrated on chip then chip size becomes larger even wafer node is going narrower. To sustain the similar package size with larger chip size, fine pitch PoP is required. In this paper, 0.3 and 0.27mm MIF pitch PoP will be studied as a solution for fine pitch PoP and as a interface material between Top and Bottom package, solder ball and Cu post will be evaluated.
Keywords :
copper; fine-pitch technology; integrated circuit packaging; integrated memory circuits; solders; 3D integration; Cu; Cu post; TMV solution; bottom package; chip size; fine pitch PoP; logic processor; memory device; memory interface pitch; mobile handsets; package-on-package; portable multimedia devices; solder ball; stable stacking performance; top package; Bridges; Materials; Performance evaluation; Reliability; Stacking; Standards; Vehicles; Cu post; PoP; PoP stacking; TMV; fine MIF pitch;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
CPMT Symposium Japan (ICSJ), 2013 IEEE 3rd
Conference_Location :
Kyoto
Print_ISBN :
978-1-4799-2718-0
Type :
conf
DOI :
10.1109/ICSJ.2013.6756077
Filename :
6756077
Link To Document :
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