DocumentCode
3470480
Title
Realization of an 8-bit High Performance Network Microcontroller
Author
Liang, Ke ; Li, Guo-Feng ; Ma, Shi-Liang ; Li, Nan ; Shi, Peng ; Qin, Shi-Cai
Author_Institution
Coll. of Inf. Tech. Sci., Nankai Univ., Tianjin
fYear
2006
fDate
2006
Abstract
This article introduces the implementation of an 8-bit high performance network microcontroller. This chip is mainly composed of an 8-bit embedded MCU integrated with a 10M Ethernet MAC. A two-stage pipeline and ESFR (external special function register) method are adopted to design a high performance MCU. The architecture, features and main modules realization of the chip are discussed in the paper. The chip is fabricated using 0.25 mum CMOS technology and the die size is 2.6 times 2.6mm2. Some successfully developed applications based on this network microcontroller are also presented in this article
Keywords
CMOS digital integrated circuits; embedded systems; integrated circuit design; microcontrollers; 0.25 micron; 10M Ethernet MAC; 8 bit; CMOS technology; embedded MCU; external special function register; network microcontroller; two-stage pipeline; Access control; Application software; CMOS technology; Clocks; Costs; Ethernet networks; Microcontrollers; Pipelines; Registers; Timing;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State and Integrated Circuit Technology, 2006. ICSICT '06. 8th International Conference on
Conference_Location
Shanghai
Print_ISBN
1-4244-0160-7
Electronic_ISBN
1-4244-0160-7
Type
conf
DOI
10.1109/ICSICT.2006.306245
Filename
4098449
Link To Document