DocumentCode :
3470561
Title :
A Novel Mini-LVDS Receiver in 0.35-um CMOS
Author :
Chen, Chung-Yuan ; Sun, Tai-Ping
Author_Institution :
Dept. of Electr. Eng., Nat. Chi Nan Univ., Nantou
fYear :
2006
fDate :
2006
Firstpage :
1499
Lastpage :
1501
Abstract :
This paper presents the design of receiver circuits for flat-plane application. Due to the differential transmission technique and the low voltage swing, mini-LVDS (low-voltage differential signaling) allows high transmission speeds and low power consumption at the same time. In the proposed receiver, high transmission speed with the minimum common-mode and differential voltage at the input for mini-LVDS application was achieved. The circuit was designed in a 3.3-V 0.35-mum CMOS technology, and the transmission operations is more than 500 Mb/s with random data patterns. The total power consumption is 3.5mW
Keywords :
CMOS integrated circuits; low-power electronics; receivers; 0.35 micron; 3.3 V; 3.5 mW; CMOS integrated circuits; differential transmission; low-voltage differential signaling; mini-LVDS receiver; CMOS technology; Circuits; Clocks; Costs; Energy consumption; Frequency; Hysteresis; Intersymbol interference; Low voltage; Packaging;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State and Integrated Circuit Technology, 2006. ICSICT '06. 8th International Conference on
Conference_Location :
Shanghai
Print_ISBN :
1-4244-0160-7
Electronic_ISBN :
1-4244-0161-5
Type :
conf
DOI :
10.1109/ICSICT.2006.306270
Filename :
4098453
Link To Document :
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