Title :
2.5 Gb/s 557 mW STM-16 regenerator section terminating LSI chip
Author :
Kawai, Kunihiro ; Koike, K. ; Takei, Y. ; Onozawa, A. ; Obara, H. ; Ichino, H.
Author_Institution :
NTT Opt. Network Syst. Labs., Kanagawa, Japan
Abstract :
The sub-Watt STM-16 regenerator-section terminating digital LSI covering all functions of an STM-16 repeater, uses advanced bipolar-LSI technology. Conventional bipolar circuits are not suitable for low-power operation, because they draw a constant current and because V/sub BE/ ("on" voltage between base and emitter) is not scaled. Power-management logic for intermittently supplying a constant current, 2.5 V ECL for supply-voltage reduction, and power-optimizing CAD for minimizing total current overcome the difficulty in reducing the power of Gb/s bipolar LSIs, and enable power reduction by a factor of about 10.
Keywords :
bipolar logic circuits; circuit layout CAD; circuit optimisation; emitter-coupled logic; integrated circuit layout; large scale integration; multimedia communication; network routing; optical communication equipment; optical fibre networks; synchronisation; synchronous digital hierarchy; telecommunication terminals; 0.5 mum; 2.5 Gbit/s; 2.5 V; 557 mW; ECL; LSI routing; STM-16 regenerator section terminating LSI chip; STM-16 repeater; base/emitter on voltage scaling; bipolar-LSI technology; digital LSI; low-power operation; multimedia services; power-management logic; power-optimizing CAD; supply-voltage reduction; total current minimization; Circuits; Energy management; Large scale integration; Logic design; Multimedia systems; Power dissipation; Power generation; Power system reliability; Routing; Voltage;
Conference_Titel :
Solid-State Circuits Conference, 1997. Digest of Technical Papers. 43rd ISSCC., 1997 IEEE International
Conference_Location :
San Francisco, CA, USA
Print_ISBN :
0-7803-3721-2
DOI :
10.1109/ISSCC.1997.585314
