Title :
A 330 MHz 4-way superscalar microprocessor
Author :
Greenhill, D. ; Anderson, E. ; Bauman, J. ; Charnas, A. ; Cheerla, R. ; Hao Chen ; Doreswamy, M. ; Ferolito, P. ; Gopaladhine, S. ; Ho, K. ; Wenjay Hsu ; Kongetira, P. ; Melanson, R. ; Reddy, V. ; Salem, R. ; Sathianathan, H. ; Shah, S. ; Shin, K. ; Sriva
Author_Institution :
Sun Microsyst. Inc., Mountain View, CA, USA
Abstract :
This is a second-generation, highly-integrated superscalar processor implementing the Sparc V9 64b architecture. Performance is improved by increasing clock frequency and by improvements in the memory system. Clock rates up to 330 MHz are achieved. Microarchitecture improvements include a pre-fetch instruction, multiple outstanding block loads and stores, and support for a wide range of cache sizes and system frequencies. These result in improved computation, multimedia, and networking performance. This design is implemented on a 5-metal-layer, 0.35 /spl mu/m process.
Keywords :
CMOS digital integrated circuits; integrated circuit design; microprocessor chips; parallel architectures; 0.35 mum; 330 MHz; 4-way superscalar microprocessor; 5-metal-layer process; 64 bit; Sparc V9 64b architecture; cache size range; clock frequency; computation performance; highly-integrated superscalar processor; memory system; microarchitecture improvements; multimedia performance; multiple outstanding block loads; networking performance; pre-fetch instruction; Capacitors; Circuits; Clocks; Diodes; Frequency; MOS devices; Microprocessors; Pipelines; Sun; Timing;
Conference_Titel :
Solid-State Circuits Conference, 1997. Digest of Technical Papers. 43rd ISSCC., 1997 IEEE International
Conference_Location :
San Francisco, CA, USA
Print_ISBN :
0-7803-3721-2
DOI :
10.1109/ISSCC.1997.585318
