Title :
A 400 MHz S/390 microprocessor
Author :
Webb, C.F. ; Anderson, C.J. ; Sigal, L. ; Shepard, K.L. ; Liptay, J.S. ; Warnock, J.D. ; Curran, B. ; Krumm, B.W. ; Mayo, M.D. ; Camporese, P.J. ; Schwarz, E.M. ; Farrell, M.S. ; Restle, P.J. ; Averill, R.M., III ; Siegel, T.J. ; Huott, W.V. ; Chan, Y.H.
Author_Institution :
Syst. Div., IBM Corp., Poughkeepsie, NY, USA
Abstract :
A microprocessor implementing IBM S/390 architecture operates in a system at up to 400 MHz (2.5 ns). The microprocessor, initially in IBM CMOS5X technology, migrated to CMOS6S by shrinking the FET length dimensions but not shrinking the interconnect dimensions. The chip is 17.35/spl times/17.30 mm/sup 2/ with about 7.8M transistors. The power supply is 2.5 V and measured power dissipation at 300 MHz is 37 W. The microprocessor features two instruction units, two fixed point units, two floating point units, a buffer control element, and a register unit. It dispatches one instruction per cycle. A PLL provides a processor clock at 2/spl times/ the system bus frequency.
Keywords :
CMOS digital integrated circuits; integrated circuit design; integrated circuit measurement; microprocessor chips; parallel architectures; pipeline processing; 2.5 V; 2.5 ns; 300 MHz; 37 W; 400 MHz; CMOS6S technology; FET length dimensions; IBM S/390 architecture; PLL; S/390 microprocessor; buffer control element; fixed point units; floating point units; instruction units; power dissipation; power supply; processor clock; register unit; CMOS technology; FETs; Microprocessors; Power dissipation; Power measurement; Power supplies; Power system interconnection; Registers; Semiconductor device measurement; Transistors;
Conference_Titel :
Solid-State Circuits Conference, 1997. Digest of Technical Papers. 43rd ISSCC., 1997 IEEE International
Conference_Location :
San Francisco, CA, USA
Print_ISBN :
0-7803-3721-2
DOI :
10.1109/ISSCC.1997.585319
