DocumentCode
3471274
Title
A hierarchy watermarking technique for IP core protection
Author
Sun, GuangYu ; Gao, Zhiqiang ; Ni, Min
Author_Institution
Inst. of Microelectron., Tsinghua Univ., Beijing
Volume
2
fYear
2005
fDate
24-0 Oct. 2005
Firstpage
1131
Lastpage
1135
Abstract
The lack of mechanisms to protect the rights of IP creators and owners is a recognized obstacle to reuse-base methodologies. Focusing on the actual counterfeiting process of IP core, a hierarchy watermarking protection method based on constraint concept is presented in this paper. It allows designer to add watermarking in physical and gate levels to protect IP core. And the protection in behavioral level is concerned. The protection strength and compatibility to current design flow are also analyzed
Keywords
VLSI; industrial property; integrated circuit design; watermarking; IP core protection; behavioral level protection; constraint concept; hierarchy watermarking; protection compatibility; protection strength; Arithmetic; Constraint optimization; Counterfeiting; Design methodology; Integrated circuit technology; Mathematics; Protection; Sun; Very large scale integration; Watermarking;
fLanguage
English
Publisher
ieee
Conference_Titel
ASIC, 2005. ASICON 2005. 6th International Conference On
Conference_Location
Shanghai
Print_ISBN
0-7803-9210-8
Type
conf
DOI
10.1109/ICASIC.2005.1611506
Filename
1611506
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