Title :
Effective modeling of factory throughput times
Author :
Srivarsan, N. ; Kempf, K.
Author_Institution :
Intel Corp., Chandler, AZ, USA
Abstract :
Describes an effective approach to TPT modeling. Though this approach can be used in any factory, our focus here is limited to predicting TPT in a semiconductor wafer fabrication facility. We describe an abstract simulation that runs very quickly on standard PCs and is based on a model that focuses on the factors that have a major influence on TPT. The simple model includes machine assignments and variability of machine availability, operator assignments and variability of operator availability and transportation times and variability of transportation availability. The model can also handle a range of WIP management policies and include test wafer loading. Given the contents of the model, the simulation tool can be used to perform a variety of “what-if” analyses. The simulation approach as well as validation results based on implementation at actual fabrication sites are described
Keywords :
batch processing (industrial); factory automation; integrated circuit manufacture; production testing; semiconductor process modelling; TPT modeling; WIP management policies; abstract simulation; factory throughput times; machine assignments; machine availability; operator assignments; operator availability; semiconductor wafer fabrication facility; test wafer loading; transportation times; what-if analyses; Analytical models; Availability; Fabrication; Performance analysis; Personal communication networks; Production facilities; Semiconductor device modeling; Testing; Throughput; Transportation;
Conference_Titel :
Electronics Manufacturing Technology Symposium, 1995. 'Manufacturing Technologies - Present and Future', Seventeenth IEEE/CPMT International
Conference_Location :
Austin, TX
Print_ISBN :
0-7803-2996-1
DOI :
10.1109/IEMT.1995.526190