DocumentCode
3471717
Title
Effect of the process flow on negative-bias-temperature-instability
Author
Scarpa, Andrea ; Van Marwijk, Leo ; Cacciato, Antonio ; Ballarin, Fabio
Author_Institution
Philips Semicond., Nijmegen, Netherlands
fYear
2003
fDate
24-25 April 2003
Firstpage
142
Lastpage
145
Abstract
PMOSFET parametric degradation during negative-bias high temperature aging can depend on many steps of the manufacturing process flow. The effect of some process steps on NBTI is discussed with a phenomenological approach. In particular, we report a case in which plasma induced charging reduces the PMOSFET instability.
Keywords
MOSFET; ageing; interface states; plasma CVD; semiconductor device reliability; semiconductor device testing; surface charging; 125 C; NBTI; PMOSFET instability; PMOSFET parametric degradation; interface states; manufacturing process flow; negative-bias high temperature aging; phenomenological approach; plasma induced charging; process steps; reliability concern; Degradation; MOSFET circuits; Manufacturing processes; Modems; Negative bias temperature instability; Niobium compounds; Plasma temperature; Stress; Threshold voltage; Titanium compounds;
fLanguage
English
Publisher
ieee
Conference_Titel
Plasma- and Process-Induced Damage, 2003 8th International Symposium
Print_ISBN
0-7803-7747-8
Type
conf
DOI
10.1109/PPID.2003.1200943
Filename
1200943
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