A 200 Mb/s CMOS EPRML channel with integrated servo demodulator for magnetic hard disks

Author

Fields, J. ; Aziz, P. ; Bailey, J. ; Barber, F. ; Barner, J. ; Burger, H. ; Foster, R. ; Heimann, M. ; Kempsey, P. ; Mantz, L. ; Mastrocola, A. ; Peruzzi, R. ; Peterson, T. ; Raisinghani, J. ; Rauschmayer, R. ; Saniski, M. ; Sayiner, N. ; Setty, P. ; Tedj

Author_Institution

Bell Labs., Lucent Technol., Allentown, PA, USA

fYear

1997

fDate

8-8 Feb. 1997

Firstpage

314

Lastpage

315

Abstract

This second-generation partial-response maximum-likelihood (PRML) read channel device implements an extended partial-response class 4 (EPR4) architecture by adding an EPR4 post-processor to the PR4 channel previously described. Only a single reference resistor and power-supply decoupling are required to form a complete read, write, and servo demodulation solution. Additions to the PR4 architecture include adaptive MR head asymmetry (MRA) cancellation and thermal asperity (TA) detection and correction. The servo demodulator supports 20 MHz bursts and includes a 9 b analog to digital converter (ADC) interface.

Keywords

CMOS analogue integrated circuits; demodulation; demodulators; hard discs; maximum likelihood detection; partial response channels; servomechanisms; 200 Mbit/s; CMOS EPRML channel; EPR4 post-processor; integrated servo demodulator; magnetic hard disk; Demodulation; Detectors; Digital filters; Finite impulse response filter; Hard disks; Maximum likelihood detection; Pulse amplifiers; Servomechanisms; Timing; Viterbi algorithm;

fLanguage

English

Publisher

ieee

Conference_Titel

Solid-State Circuits Conference, 1997. Digest of Technical Papers. 43rd ISSCC., 1997 IEEE International

Conference_Location

San Francisco, CA, USA

ISSN

0193-6530

Print_ISBN

0-7803-3721-2

Type

conf

DOI

10.1109/ISSCC.1997.585398

Filename

585398