A 250MSPS 8-Bit Analog-to-Digital Converter Based on 0.35μm BiCMOS Technology

Author

Wang, Yong-lu ; Wang, Zhuo-yun ; Zhou, Shu-tao ; Xiao, Kun-guang

Author_Institution

Nat. Lab. of Analog Integrated Circuits, Chongqing

fYear

2006

fDate

23-26 Oct. 2006

Firstpage

1699

Lastpage

1701

Abstract

An 8-bit 250MSPS flash A/D converter using 0.35mum BiCMOS process is presented in the paper. A novel sample-and-hold amplifier is used to improve sampling rate of the A/D converter, and the amount of input capacitors and equal resistor network is reduced by using an interpolating technique. Tri-input AND gate, latch and coding network are designed to overcome bubble and sparkle codes. Operating at 3.3V supply voltage, the A/D converter has a signal-to-noise ratio (SNR) of 47.3dB and it dissipates 561mW of power.

Keywords

BiCMOS integrated circuits; analogue-digital conversion; sample and hold circuits; 0.35 micron; 3.3 V; 561 mW; 8 bit; A/D converter; BiCMOS technology; analog-to-digital converter; coding network; interpolating technique; latch network; sample-and-hold amplifier; tri-input AND gate; Analog-digital conversion; BiCMOS integrated circuits; Data acquisition; Integrated circuit technology; Latches; Oscilloscopes; Preamplifiers; Resistors; Sampling methods; Voltage control;

fLanguage

English

Publisher

ieee

Conference_Titel

Solid-State and Integrated Circuit Technology, 2006. ICSICT '06. 8th International Conference on

Conference_Location

Shanghai

Print_ISBN

1-4244-0160-7

Electronic_ISBN

1-4244-0161-5

Type

conf

DOI

10.1109/ICSICT.2006.306376

Filename

4098515