Title : 
A 1 GHz dual-loop microprocessor PLL with instant frequency shifting
         
        
            Author : 
Bhagwan, R. ; Rogers, A.
         
        
            Author_Institution : 
Sun Microsystems, Mountain View, CA, USA
         
        
        
        
        
        
            Abstract : 
Increase in the speed of microprocessors and simultaneous reduction in power supply voltage have imposed more restrictions on the design of clock generators. They must now provide a low-jitter output in the presence of increasingly hostile power supply environments, larger frequency multiplication factors, and dynamic manipulation ofthe output frequency. This clock generator operates at 1.6-2.5V and is capable of providing up to 1GHz at 1.6V. A dual loop de-skewing architecture with in-loop dividers enables the microprocessor core to switch from 1 to 1/64 of the VCO frequency that is itself an integer multiple (e.g., 4/spl times/) of the external reference frequency.
         
        
            Keywords : 
clocks; digital phase locked loops; integrated circuit design; jitter; microprocessor chips; 1 GHz; 1.6 to 2.5 V; VCO frequency; clock generators; de-skewing architecture; dual-loop microprocessor PLL; dynamic manipulation; external reference frequency; frequency multiplication factors; instant frequency shifting; low-jitter output; power supply voltage; Clocks; Frequency conversion; Manipulator dynamics; Microprocessors; Phase locked loops; Power generation; Power supplies; Switches; Voltage; Voltage-controlled oscillators;
         
        
        
        
            Conference_Titel : 
Solid-State Circuits Conference, 1997. Digest of Technical Papers. 43rd ISSCC., 1997 IEEE International
         
        
            Conference_Location : 
San Francisco, CA, USA
         
        
        
            Print_ISBN : 
0-7803-3721-2
         
        
        
            DOI : 
10.1109/ISSCC.1997.585409