DocumentCode
3471955
Title
Clock-powered logic for a 50 MHz low-power RISC datapath
Author
Tzartzanis, N. ; Athas, W.C.
Author_Institution
Southern California Univ., Marina del Rey, CA, USA
fYear
1997
fDate
8-8 Feb. 1997
Firstpage
338
Lastpage
339
Abstract
This low-power microprocessor datapath is based on energy recovery by which dissipation is reduced for power-critical lines while high performance is sustained. With the energy-recovery approach, the clocks directly drive the capacitive loads. The initial benefit is that the VLSI chips dissipate less heat. Employing an energy efficient resonant or stepwise (charge-recycling) clock driver results in a low-power system because circuit energy is recovered and reused rather than dissipated as heat. A 16b datapath based on this approach contains a 16-word, 3-port register file (RF), an arithmetic logic unit (ALU), a compare unit (CU), bypass logic, PLA-based control logic, a clock generator (CG) that produces resonant or conventional clock pulses, and 16 pad drivers.
Keywords
VLSI; clocks; driver circuits; microprocessor chips; programmable logic arrays; reduced instruction set computing; 16 bit; 50 MHz; PLA-based control logic; VLSI chips; arithmetic logic unit; bypass logic; capacitive loads; circuit energy; clock generator; clock-powered logic; compare unit; energy efficient resonant driver; energy recovery; low-power RISC datapath; low-power system; microprocessor datapath; pad drivers; power-critical lines; stepwise clock driver; three-port register file; Clocks; Driver circuits; Energy efficiency; Heat recovery; Logic; Microprocessors; RLC circuits; Reduced instruction set computing; Resonance; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Circuits Conference, 1997. Digest of Technical Papers. 43rd ISSCC., 1997 IEEE International
Conference_Location
San Francisco, CA, USA
ISSN
0193-6530
Print_ISBN
0-7803-3721-2
Type
conf
DOI
10.1109/ISSCC.1997.585410
Filename
585410
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