Title :
Design of Switch Capacitor Integrator for DRSSADC
Author :
She, Wangjian ; Lu, Huang ; Dong, Lizheng
Author_Institution :
Dept. of Electron. Sci. & Technol., Univ. of Sci. & Technol. of China, Hefei
Abstract :
Switch capacitor integrator circuits for dual-ramp-single-slop analog to digital converter (DRSSADC) is designed. The switch capacitor integrator uses a fully differential topology combined with input-to-output class AB amplifier and improved switch. Using the methods of Monte Carlo analysis and HSPICE simulation, the paper emphasizes to present design of the amplifier. Based on CSM 0.35mum CMOS process, the amplifier achieves high voltage gain and broad frequency band response under 3 V supply voltage, which consumes only 125 muW, achieving 74 dB open-loop gain, 8 MHz unity gain band width and 80deg phase margin for a load capacitance of 5 pF. And the integrator requires only 225 muW of power to meet the DRSSADC requirements
Keywords :
CMOS integrated circuits; Monte Carlo methods; SPICE; analogue-digital conversion; integrated circuit design; integrating circuits; network topology; switched capacitor networks; 0.35 micron; 125 muW; 225 muW; 3 V; 5 pF; 74 dB; 8 MHz; CSM CMOS process; DRSSADC; HSPICE simulation; Monte Carlo analysis; dual-ramp-single-slop analog to digital converter; frequency band response; fully differential topology; input-to-output class AB amplifier; integrated circuit design; load capacitance; open-loop gain; phase margin; switch capacitor integrator circuit; unity gain band width; voltage gain; Analog-digital conversion; Analytical models; Circuit simulation; Circuit topology; Differential amplifiers; Monte Carlo methods; Switched capacitor circuits; Switches; Switching circuits; Voltage;
Conference_Titel :
Solid-State and Integrated Circuit Technology, 2006. ICSICT '06. 8th International Conference on
Conference_Location :
Shanghai
Print_ISBN :
1-4244-0160-7
Electronic_ISBN :
1-4244-0161-5
DOI :
10.1109/ICSICT.2006.306421
