DocumentCode
3472952
Title
A Low Cost design for Optimized IDCT and de-quantization of H.264
Author
Yi-fan, Lin ; Xiao-yang, Zeng ; Jun, Chen ; Zhang, Zhang
Author_Institution
State Key Lab. of ASIC & Syst., Fudan Univ., Shanghai
fYear
2006
fDate
23-26 Oct. 2006
Firstpage
1893
Lastpage
1895
Abstract
H.264 also known as MPEG4 part 10 is a promising video coding standard for the next generation video compression. To meet the needs of low cost H.264 decoders, this paper presents a low cost hardware implementation for the improved IDCT (inverse discrete cosine transform) and de-quantization of H.264. For the tradeoff between areas and processing speed, this hardware implementation achieves real-time decoding for all available video resolution formats at a quite low area cost
Keywords
VLSI; data compression; discrete cosine transforms; integrated circuit design; quantisation (signal); video codecs; video coding; H.264 standard; MPEG4; VLSI; dequantization; inverse discrete cosine transform; video coding; video compression; Computer architecture; Cost function; Decoding; Design optimization; Hardware; Pipeline processing; Table lookup; Throughput; Very large scale integration; Video compression;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State and Integrated Circuit Technology, 2006. ICSICT '06. 8th International Conference on
Conference_Location
Shanghai
Print_ISBN
1-4244-0160-7
Electronic_ISBN
1-4244-0161-5
Type
conf
DOI
10.1109/ICSICT.2006.306499
Filename
4098573
Link To Document