DocumentCode :
3473091
Title :
A new FFT architecture for 4 × 4 MIMO-OFDMA systems with variable symbol lengths
Author :
Karachalios, A. ; Nakos, K. ; Reisis, D. ; Alnuweiri, H.
Author_Institution :
Dept. of Phys., Nat. & Kapodistrian Univ. of Athens, Athens, Greece
fYear :
2009
fDate :
15-17 Dec. 2009
Firstpage :
80
Lastpage :
84
Abstract :
We present a new FFT architecture for multi-input multi-output (MIMO) OFDMA wireless systems that require processing variable symbol lengths, ranging from 128 to 2048 complex points. The organization is based on 16 concurrent butterfly processing elements with each element computing a 128-point FFT by implementing an in-place technique. A novel processor-memory interconnection scheme allows the processing elements to operate in sets of k, 1 ¿ k ¿ 16, for completing FFT computations of size 128 × k, up to 2048 points. The architecture scales to support 4 × 4 MIMO-OFDMA operation. An FPGA implementation shows that the proposed organization requires 9995 slices on Xilinx Virtex-4 compared to 21624 slices of four parallel FFT architectures accomplishing the same task.
Keywords :
MIMO communication; OFDM modulation; fast Fourier transforms; field programmable gate arrays; FFT architecture; FPGA; MIMO-OFDMA system; OFDMA wireless system; Xilinx Virtex-4; concurrent butterfly processing element; fast Fourier transform; in-place technique; multiinput multioutput system; processor-memory interconnection; variable symbol length; Computer architecture; Concurrent computing; Fast Fourier transforms; Field programmable gate arrays; Laboratories; MIMO; Multiprocessor interconnection networks; Physics computing; Telecommunication standards; Throughput;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Innovations in Information Technology, 2009. IIT '09. International Conference on
Conference_Location :
Al Ain
Print_ISBN :
978-1-4244-5698-7
Type :
conf
DOI :
10.1109/IIT.2009.5413367
Filename :
5413367
Link To Document :
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